| package templates |
| |
| import com.inchron.realtime.root.model.FrequencyUnit |
| import com.inchron.realtime.root.model.GenericSystem |
| import com.inchron.realtime.root.model.Model |
| import com.inchron.realtime.root.model.memory.MemoryType |
| import java.util.ArrayList |
| import java.util.List |
| import org.eclipse.app4mc.amalthea.model.Cache |
| import org.eclipse.app4mc.amalthea.model.Frequency |
| import org.eclipse.app4mc.amalthea.model.FrequencyDomain |
| import org.eclipse.app4mc.amalthea.model.HWModel |
| import org.eclipse.app4mc.amalthea.model.HwStructure |
| import org.eclipse.app4mc.amalthea.model.Memory |
| import org.eclipse.app4mc.amalthea.model.ProcessingUnit |
| import org.eclipse.app4mc.amalthea.model.StructureType |
| import templates.utils.AmltCacheModel |
| |
| /** |
| * This class is responsible for the transformation of AMALTHEA Hardware Model into corresponding INCHRON mdoel elements and accordingly invoke other transformations |
| */ |
| public class HWTransformer extends AbstractAmaltheaInchronTransformer { |
| |
| |
| |
| public def transfromHWModel(HWModel amltHWModel, Model inchronModel) { |
| |
| this.inchronModel=inchronModel |
| |
| val AmltCacheModel cacheModel=customObjsStore.getInstance(AmltCacheModel) |
| |
| /*- Transformation of FrequencyDomain elements to Clock elements in Inchron */ |
| |
| amltHWModel?.domains.filter[it instanceof FrequencyDomain].forEach [ amltQuartz | |
| |
| val inchronClock = createClock(amltQuartz as FrequencyDomain) |
| inchronModel.clocks.add(inchronClock) |
| ] |
| |
| /*- Transformation of each Memory element of SYSTEM to Memory element in Inchron*/ |
| |
| amltHWModel?.structures.filter[it.structureType==StructureType.SYSTEM]?.forEach[st| |
| st?.modules.filter[it instanceof Memory].forEach[amltMem| |
| val inchronMemory = createMemory(amltMem as Memory) |
| inchronModel.memories.add(inchronMemory) |
| ] |
| ] |
| |
| /*- Collecting all Amalthea ECU elements */ |
| |
| val amltECUs=new ArrayList |
| |
| amltHWModel?.structures.filter[it.structureType==StructureType.SYSTEM]?.forEach[it?.structures.filter[it.structureType==StructureType.ECU].forEach[ |
| ecu| |
| amltECUs.add(ecu) |
| ]] |
| |
| /*- Conversion of Amalthea ECU and its sub-elements into corresponding Inchron elements */ |
| |
| for (amaltheaEcu : amltECUs) { |
| |
| amaltheaEcu?.modules.forEach [ amltMem | |
| |
| /*- Transformation of each Memory element of ECU to Memory element in Inchron*/ |
| |
| if(amltMem instanceof Memory){ |
| val inchronMemory = createMemory(amltMem) |
| inchronModel.memories.add(inchronMemory) |
| |
| } |
| ] |
| |
| val List<GenericSystem> allGenericSystems=new ArrayList<GenericSystem> |
| |
| /*- Transformation of each Structure of type MicroController to correspnding Inchron element*/ |
| |
| for (amaltheaMicroController : amaltheaEcu?.structures.filter[it.structureType==StructureType.MICROCONTROLLER]) { |
| |
| /*- Each MicroController is created as GenericSystem element in Inchron and corresponding data of sub-elements is transformed accordingly. */ |
| |
| val genericSystem = OSTransformerInstance.createGenericSystem(amaltheaMicroController) |
| |
| /*-Building Inchron CPU element */ |
| val inchronCpu = createCpu(amaltheaMicroController); |
| |
| /*-Adding Inchron CPU and GenericSystem elements to Inchron Model */ |
| |
| inchronModel.cpus.add(inchronCpu) |
| |
| inchronModel.systems.add(genericSystem) |
| |
| /*- Transformation of each Memory element of MicroController to Memory element in Inchron*/ |
| |
| amaltheaMicroController?.modules.filter[it instanceof Memory].forEach [ amltMem | |
| val inchronMemory = createMemory(amltMem as Memory) |
| inchronCpu.memories.add(inchronMemory) |
| ] |
| |
| /*-Adding Amalthea microController and Inchron GenericSystem into the Cache map. */ |
| cacheModel.cacheMappingAmltMicroController_GenericSystem(amaltheaMicroController, genericSystem) |
| |
| /*-Collecting all Inchron GenericSystems, so as to process them later */ |
| allGenericSystems.add(genericSystem) |
| } |
| |
| for (genericSystem : allGenericSystems) { |
| |
| /*-======================================Process each Inchron GenericSystem and populate the data ======================================*/ |
| |
| OSTransformerInstance.fillGenericSystem(genericSystem, amaltheaModel, inchronModel) |
| |
| } |
| } |
| |
| /*-Adding Stimulation scenarios to Inchron Model */ |
| inchronModel.stimulationScenarios.add(stimuliTransformerInstance.createstimulationScenario(amaltheaModel)) |
| } |
| |
| /** |
| * Creating a Inchron CPU element from AMALTHEA HwStructure of type MicroController |
| */ |
| public def create inchronModelFactory.createCpu createCpu(HwStructure amltMicrocontroller) { |
| |
| it.name = amltMicrocontroller.name |
| |
| /*Transformation of Amalthea ProcessingUnit to CpuCore element in Inchron */ |
| |
| for (amltCore : amltMicrocontroller?.modules.filter[it instanceof ProcessingUnit]) { |
| |
| val inchronCpuCore = createCpuCore(amltCore as ProcessingUnit) |
| |
| /*- Transformation of each Memory element of ProcessingUnit to Memory element of type CACHE in Inchron*/ |
| |
| (amltCore as ProcessingUnit)?.caches.forEach [ amltMem | |
| val inchronMemory = createMemory_CacheType(amltMem) |
| inchronMemory.type = MemoryType.CACHE |
| it.memories.add(inchronMemory) |
| ] |
| |
| inchronCpuCore.cpu = it |
| |
| it.cores.add(inchronCpuCore) |
| |
| /*-Transformation of FrequencyDomain of the ProcessingUnit in Amalthea */ |
| val amltQuartz = amltCore?.frequencyDomain |
| |
| if (amltQuartz != null) { |
| val inchronClock = createClock(amltQuartz) |
| |
| //TODO:Clarify if this is correct ? as the CpuCore Clock into is set to the CPU level in Inchron |
| it.clock = (inchronClock) //TODO: Error : In this case, CPU will only hold the Clock of last CpuCore |
| } |
| |
| } |
| |
| } |
| |
| /** |
| * Creating Inchron Clock element for FrequencyDomain element of Amalthea |
| */ |
| def create inchronModelFactory.createClock createClock(FrequencyDomain amltQuartz) { |
| |
| it.name = amltQuartz.name |
| it.frequency = createFrequency(amltQuartz.defaultValue) |
| } |
| |
| /** |
| * Creating Inchron Frequency element for the corresponding Frequency element of Amalthea |
| */ |
| def create inchronModelFactory.createFrequency createFrequency(Frequency amltFrequency) { |
| |
| it.unit = FrequencyUnit.getByName(amltFrequency?.unit.getName) |
| it.value = amltFrequency?.value.floatValue |
| } |
| |
| /** |
| * Creating Inchron CpuCore from ProcessingUnit element of Amalthea |
| */ |
| def create inchronModelFactory.createCpuCore createCpuCore(ProcessingUnit core) { |
| |
| it.name = core.name |
| |
| } |
| |
| /** |
| * Creating Inchron Memory element from Memory element of Amalthea. |
| * In this method, corresponding FrequencyDomain of the Amalthea element is accordingly converted to Inchron Clock element |
| */ |
| def create inchronmemoryFactory.createMemory createMemory(Memory amltMemory) { |
| |
| it.name = amltMemory.name |
| |
| if (amltMemory.frequencyDomain != null) { |
| it.clock = createClock(amltMemory.frequencyDomain) |
| it.prescaler = amltMemory?.frequencyDomain?.defaultValue?.value |
| |
| } |
| |
| } |
| |
| /** Creating Inchron Memory element from Memory element of Amalthea. |
| * In this method, corresponding FrequencyDomain of the Amalthea element is accordingly converted to Inchron Clock element |
| */ |
| def create inchronmemoryFactory.createMemory createMemory_CacheType(Cache amltMemory) { |
| |
| it.name = amltMemory.name |
| |
| if (amltMemory.frequencyDomain != null) { |
| it.clock = createClock(amltMemory.frequencyDomain) |
| it.prescaler = amltMemory?.frequencyDomain?.defaultValue?.value |
| |
| } |
| |
| } |
| } |