TCF Agent: improved register definitions for Linux targets

8 files changed, 219 insertions, 50 deletions

diff --git a/agent/machine/a64/tcf/cpu-regs-gdb.h b/agent/machine/a64/tcf/cpu-regs-gdb.h
index ca9d28f6..21d70a02 100644
--- a/agent/machine/a64/tcf/cpu-regs-gdb.h
+++ b/agent/machine/a64/tcf/cpu-regs-gdb.h
@@ -72,6 +72,83 @@ static const char * cpu_regs_gdb_a64 =
 "    <field name='N'   start='31' end='31' />\n"
 "  </flags>\n"
 "  <reg name='cpsr' bitsize='32' type='cpsr_flags' />\n"
+"</feature>\n"
+"<feature name='org.gnu.gdb.aarch64.fpu'>\n"
+"  <vector id='v2d' type='ieee_double' count='2'/>\n"
+"  <vector id='v2u' type='uint64' count='2'/>\n"
+"  <vector id='v2i' type='int64' count='2'/>\n"
+"  <vector id='v4f' type='ieee_single' count='4'/>\n"
+"  <vector id='v4u' type='uint32' count='4'/>\n"
+"  <vector id='v4i' type='int32' count='4'/>\n"
+"  <vector id='v8u' type='uint16' count='8'/>\n"
+"  <vector id='v8i' type='int16' count='8'/>\n"
+"  <vector id='v16u' type='uint8' count='16'/>\n"
+"  <vector id='v16i' type='int8' count='16'/>\n"
+"  <vector id='v1u' type='uint128' count='1'/>\n"
+"  <vector id='v1i' type='int128' count='1'/>\n"
+"  <union id='vnd'>\n"
+"    <field name='f' type='v2d'/>\n"
+"    <field name='u' type='v2u'/>\n"
+"    <field name='s' type='v2i'/>\n"
+"  </union>\n"
+"  <union id='vns'>\n"
+"    <field name='f' type='v4f'/>\n"
+"    <field name='u' type='v4u'/>\n"
+"    <field name='s' type='v4i'/>\n"
+"  </union>\n"
+"  <union id='vnh'>\n"
+"    <field name='u' type='v8u'/>\n"
+"    <field name='s' type='v8i'/>\n"
+"  </union>\n"
+"  <union id='vnb'>\n"
+"    <field name='u' type='v16u'/>\n"
+"    <field name='s' type='v16i'/>\n"
+"  </union>\n"
+"  <union id='vnq'>\n"
+"    <field name='u' type='v1u'/>\n"
+"    <field name='s' type='v1i'/>\n"
+"  </union>\n"
+"  <union id='aarch64v'>\n"
+"    <field name='d' type='vnd'/>\n"
+"    <field name='s' type='vns'/>\n"
+"    <field name='h' type='vnh'/>\n"
+"    <field name='b' type='vnb'/>\n"
+"    <field name='q' type='vnq'/>\n"
+"  </union>\n"
+"  <reg name='v0' bitsize='128' type='aarch64v' regnum='34'/>\n"
+"  <reg name='v1' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v2' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v3' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v4' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v5' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v6' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v7' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v8' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v9' bitsize='128' type='aarch64v' />\n"
+"  <reg name='v10' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v11' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v12' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v13' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v14' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v15' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v16' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v17' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v18' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v19' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v20' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v21' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v22' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v23' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v24' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v25' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v26' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v27' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v28' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v29' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v30' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='v31' bitsize='128' type='aarch64v'/>\n"
+"  <reg name='fpsr' bitsize='32'/>\n"
+"  <reg name='fpcr' bitsize='32'/>\n"
 "</feature>\n";
 
 #endif /* D_cpu_regs_gdb_a64 */
diff --git a/agent/machine/a64/tcf/cpudefs-mdep.c b/agent/machine/a64/tcf/cpudefs-mdep.c
index 0809edd7..8dd7a14d 100644
--- a/agent/machine/a64/tcf/cpudefs-mdep.c
+++ b/agent/machine/a64/tcf/cpudefs-mdep.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2015 Xilinx, Inc. and others.
+ * Copyright (c) 2015-2017 Xilinx, Inc. and others.
  * All rights reserved. This program and the accompanying materials
  * are made available under the terms of the Eclipse Public License v1.0
  * and Eclipse Distribution License v1.0 which accompany this distribution.
@@ -38,10 +38,13 @@
 #define REG_OFFSET(name) offsetof(REG_SET, name)
 
 RegisterDefinition regs_def[] = {
-    { "r0",      REG_OFFSET(gp.regs[0]),              8, 0, 0},
-    { "sp",      REG_OFFSET(gp.sp),                   8, 31, 31},
-    { "pc",      REG_OFFSET(gp.pc),                   8, 33, 33},
-    { NULL,      0, 0,  0,  0},
+    { "x0",      REG_OFFSET(gp.regs[0]),              8, 0, 0 },
+    { "sp",      REG_OFFSET(gp.sp),                   8, 31, 31 },
+    { "pc",      REG_OFFSET(gp.pc),                   8, 33, 33 },
+    { "cpsr",    REG_OFFSET(gp.pstate),               8, -1, -1 },
+    { "orig_x0", REG_OFFSET(gp.orig_x0),              8, -1, -1 },
+    { "vfp",     0, 0, -1, -1, 0, 0, 1, 1 },
+    { NULL },
 };
 
 RegisterDefinition * regs_index = NULL;
@@ -92,19 +95,70 @@ static void ini_reg_defs(void) {
             r->role = "PC";
             pc_def = r;
         }
-        else if (strcmp(r->name, "r0") == 0) {
+        else if (strcmp(r->name, "x0") == 0) {
             unsigned i;
             for (i = 1; i < 31; i++) {
                 char name[64];
                 r = alloc_reg();
                 *r = *d;
-                snprintf(name, sizeof(name), "r%d", i);
+                snprintf(name, sizeof(name), "x%d", i);
                 r->name = loc_strdup(name);
                 r->offset = d->offset + i * 8;
                 r->dwarf_id = d->dwarf_id + i;
                 r->eh_frame_id = d->eh_frame_id + i;
             }
         }
+        else if (strcmp(r->name, "vfp") == 0) {
+            int n;
+            RegisterDefinition * x = NULL;
+            for (n = 0; n < 2; n++) {
+                unsigned i;
+                RegisterDefinition * w = alloc_reg();
+                w->no_read = 1;
+                w->no_write = 1;
+                w->parent = r;
+                switch (n) {
+                case 0:
+                    w->name = "64-bit";
+                    for (i = 0; i < 64; i++) {
+                        char nm[32];
+                        x = alloc_reg();
+                        snprintf(nm, sizeof(nm), "d%d", i);
+                        x->name = loc_strdup(nm);
+                        x->offset = REG_OFFSET(fp.vregs) + i * 8;
+                        x->size = 8;
+                        x->fp_value = 1;
+                        x->parent = w;
+                    }
+                    break;
+                case 1:
+                    w->name = "128-bit";
+                    for (i = 0; i < 32; i++) {
+                        char nm[32];
+                        x = alloc_reg();
+                        snprintf(nm, sizeof(nm), "v%d", i);
+                        x->name = loc_strdup(nm);
+                        x->offset = REG_OFFSET(fp.vregs) + i * 16;
+                        x->size = 16;
+                        x->dwarf_id = 64 + i;
+                        x->eh_frame_id = 64 + i;
+                        x->fp_value = 1;
+                        x->parent = w;
+                    }
+                    break;
+                }
+            }
+            x = alloc_reg();
+            x->name = "fpsr";
+            x->offset = REG_OFFSET(fp.fpsr);
+            x->size = 4;
+            x->parent = r;
+            x = alloc_reg();
+            x->name = "fpcr";
+            x->offset = REG_OFFSET(fp.fpcr);
+            x->size = 4;
+            x->parent = r;
+        }
     }
 }
 
diff --git a/agent/machine/a64/tcf/regset-mdep.h b/agent/machine/a64/tcf/regset-mdep.h
index 7252d9b8..8b74cb50 100644
--- a/agent/machine/a64/tcf/regset-mdep.h
+++ b/agent/machine/a64/tcf/regset-mdep.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2015 Xilinx, Inc. and others.
+ * Copyright (c) 2015-2017 Xilinx, Inc. and others.
  * All rights reserved. This program and the accompanying materials
  * are made available under the terms of the Eclipse Public License v1.0
  * and Eclipse Distribution License v1.0 which accompany this distribution.
@@ -27,6 +27,9 @@ struct regset_gp {
     uint64_t sp;
     uint64_t pc;
     uint64_t pstate;
+    uint64_t orig_x0;
+    uint64_t syscallno;
+    uint64_t orig_addr_limit;
 };
 
 struct regset_fp_reg {
@@ -40,6 +43,6 @@ struct regset_fp {
 };
 
 #define REGSET_GP NT_PRSTATUS
-#define REGSET_FP NT_ARM_VFP
+#define REGSET_FP NT_FPREGSET
 
 #endif
diff --git a/agent/machine/arm/tcf/cpudefs-mdep.c b/agent/machine/arm/tcf/cpudefs-mdep.c
index 6f68d5a1..27ab0129 100644
--- a/agent/machine/arm/tcf/cpudefs-mdep.c
+++ b/agent/machine/arm/tcf/cpudefs-mdep.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2013, 2016 Stanislav Yakovlev and others.
+ * Copyright (c) 2013-2017 Stanislav Yakovlev and others.
  * All rights reserved. This program and the accompanying materials
  * are made available under the terms of the Eclipse Public License v1.0
  * and Eclipse Distribution License v1.0 which accompany this distribution.
@@ -50,30 +50,30 @@
 #define REG_OFFSET(name) offsetof(REG_SET, name)
 
 RegisterDefinition regs_def[] = {
-#   define REG_FP user.regs.uregs[11]
-#   define REG_IP user.regs.uregs[12]
-#   define REG_SP user.regs.uregs[13]
-#   define REG_LR user.regs.uregs[14]
-#   define REG_PC user.regs.uregs[15]
-#   define REG_CPSR user.regs.uregs[16]
-    { "r0",      REG_OFFSET(user.regs.uregs[0]),      4, 0, 0},
-    { "r1",      REG_OFFSET(user.regs.uregs[1]),      4, 1, 1},
-    { "r2",      REG_OFFSET(user.regs.uregs[2]),      4, 2, 2},
-    { "r3",      REG_OFFSET(user.regs.uregs[3]),      4, 3, 3},
-    { "r4",      REG_OFFSET(user.regs.uregs[4]),      4, 4, 4},
-    { "r5",      REG_OFFSET(user.regs.uregs[5]),      4, 5, 5},
-    { "r6",      REG_OFFSET(user.regs.uregs[6]),      4, 6, 6},
-    { "r7",      REG_OFFSET(user.regs.uregs[7]),      4, 7, 7},
-    { "r8",      REG_OFFSET(user.regs.uregs[8]),      4, 8, 8},
-    { "r9",      REG_OFFSET(user.regs.uregs[9]),      4, 9, 9},
-    { "r10",     REG_OFFSET(user.regs.uregs[10]),     4, 10, 10},
-    { "fp",      REG_OFFSET(user.regs.uregs[11]),     4, 11, 11},
-    { "ip",      REG_OFFSET(user.regs.uregs[12]),     4, 12, 12},
-    { "sp",      REG_OFFSET(user.regs.uregs[13]),     4, 13, 13},
-    { "lr",      REG_OFFSET(user.regs.uregs[14]),     4, 14, 14},
-    { "pc",      REG_OFFSET(user.regs.uregs[15]),     4, 15, 15},
-    { "cpsr",    REG_OFFSET(user.regs.uregs[16]),     4, 128, 128},
-    { "orig_r0", REG_OFFSET(user.regs.uregs[17]),     4, -1, -1},
+#   define REG_FP gp.regs[11]
+#   define REG_IP gp.regs[12]
+#   define REG_SP gp.regs[13]
+#   define REG_LR gp.regs[14]
+#   define REG_PC gp.regs[15]
+#   define REG_CPSR gp.regs[16]
+    { "r0",      REG_OFFSET(gp.regs[0]),      4, 0, 0},
+    { "r1",      REG_OFFSET(gp.regs[1]),      4, 1, 1},
+    { "r2",      REG_OFFSET(gp.regs[2]),      4, 2, 2},
+    { "r3",      REG_OFFSET(gp.regs[3]),      4, 3, 3},
+    { "r4",      REG_OFFSET(gp.regs[4]),      4, 4, 4},
+    { "r5",      REG_OFFSET(gp.regs[5]),      4, 5, 5},
+    { "r6",      REG_OFFSET(gp.regs[6]),      4, 6, 6},
+    { "r7",      REG_OFFSET(gp.regs[7]),      4, 7, 7},
+    { "r8",      REG_OFFSET(gp.regs[8]),      4, 8, 8},
+    { "r9",      REG_OFFSET(gp.regs[9]),      4, 9, 9},
+    { "r10",     REG_OFFSET(gp.regs[10]),     4, 10, 10},
+    { "fp",      REG_OFFSET(gp.regs[11]),     4, 11, 11},
+    { "ip",      REG_OFFSET(gp.regs[12]),     4, 12, 12},
+    { "sp",      REG_OFFSET(gp.regs[13]),     4, 13, 13},
+    { "lr",      REG_OFFSET(gp.regs[14]),     4, 14, 14},
+    { "pc",      REG_OFFSET(gp.regs[15]),     4, 15, 15},
+    { "cpsr",    REG_OFFSET(gp.cpsr),         4, 128, 128},
+    { "orig_r0", REG_OFFSET(gp.orig_r0),      4, -1, -1},
     { "vfp",     0, 0, -1, -1, 0, 0, 1, 1 },
     { NULL,      0, 0,  0,  0},
 };
diff --git a/agent/machine/arm/tcf/regset-mdep.h b/agent/machine/arm/tcf/regset-mdep.h
index 1bcf3b96..e5516042 100644
--- a/agent/machine/arm/tcf/regset-mdep.h
+++ b/agent/machine/arm/tcf/regset-mdep.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2013 Stanislav Yakovlev and others.
+ * Copyright (c) 2013-2017 Stanislav Yakovlev and others.
  * All rights reserved. This program and the accompanying materials
  * are made available under the terms of the Eclipse Public License v1.0
  * and Eclipse Distribution License v1.0 which accompany this distribution.
@@ -16,3 +16,37 @@
 
 /* offset to be applied to the PC after a software trap */
 #define TRAP_OFFSET 0
+
+#if defined(__linux__)
+
+#include <elf.h>
+
+#define MDEP_UseREGSET
+
+#ifndef NT_ARM_VFP
+#define NT_ARM_VFP 0x400
+#endif
+
+#ifndef PTRACE_GETREGSET
+#define PTRACE_GETREGSET (enum __ptrace_request)0x4204
+#endif
+
+#ifndef PTRACE_SETREGSET
+#define PTRACE_SETREGSET (enum __ptrace_request)0x4205
+#endif
+
+struct regset_gp {
+    uint32_t regs[16];
+    uint32_t cpsr;
+    uint32_t orig_r0;
+};
+
+struct regset_fp {
+    uint64_t fpregs[32];
+    uint32_t fpscr;
+};
+
+#define REGSET_GP NT_PRSTATUS
+#define REGSET_FP NT_ARM_VFP
+
+#endif
diff --git a/agent/machine/x86_64/tcf/cpu-regs-gdb.h b/agent/machine/x86_64/tcf/cpu-regs-gdb.h
index 422598db..c5690089 100644
--- a/agent/machine/x86_64/tcf/cpu-regs-gdb.h
+++ b/agent/machine/x86_64/tcf/cpu-regs-gdb.h
@@ -72,8 +72,8 @@ static const char * cpu_regs_gdb_x86_64 =
 "  <reg name='st5' bitsize='80' type='i387_ext'/>\n"
 "  <reg name='st6' bitsize='80' type='i387_ext'/>\n"
 "  <reg name='st7' bitsize='80' type='i387_ext'/>\n"
-"  <reg name='fctrl' bitsize='32' type='int' group='float'/>\n"
-"  <reg name='fstat' bitsize='32' type='int' group='float'/>\n"
+"  <reg name='fctrl' bitsize='32' type='int' group='float' id='65'/>\n"
+"  <reg name='fstat' bitsize='32' type='int' group='float' id='66'/>\n"
 "  <reg name='ftag' bitsize='32' type='int' group='float'/>\n"
 "  <reg name='fiseg' bitsize='32' type='int' group='float'/>\n"
 "  <reg name='fioff' bitsize='32' type='int' group='float'/>\n"
@@ -130,6 +130,10 @@ static const char * cpu_regs_gdb_x86_64 =
 "  <reg name='xmm14' bitsize='128' type='vec128'/>\n"
 "  <reg name='xmm15' bitsize='128' type='vec128'/>\n"
 "  <reg name='mxcsr' bitsize='32' type='i386_mxcsr' group='vector'/>\n"
+"</feature>\n"
+"<feature name='org.gnu.gdb.i386.segments'>\n"
+"  <reg name='fs_base' bitsize='64' type='int'/>\n"
+"  <reg name='gs_base' bitsize='64' type='int'/>\n"
 "</feature>\n";
 
 #endif /* D_cpu_regs_gdb_x86_64 */
diff --git a/agent/system/GNU/Linux/tcf/context-linux.c b/agent/system/GNU/Linux/tcf/context-linux.c
index 786461fe..177e9e3c 100644
--- a/agent/system/GNU/Linux/tcf/context-linux.c
+++ b/agent/system/GNU/Linux/tcf/context-linux.c
@@ -1152,10 +1152,18 @@ int context_get_isa(Context * ctx, ContextAddress addr, ContextISA * isa) {
             isa->max_instruction_size = 4;
             isa->alignment = 4;
         }
-        else if (strcmp(s, "Thumb") == 0) {
+        else if (strcmp(s, "A64") == 0) {
+            isa->max_instruction_size = 4;
+            isa->alignment = 4;
+        }
+        else if (strcmp(s, "Thumb") == 0 || strcmp(s, "ThumbEE") == 0) {
             isa->max_instruction_size = 4;
             isa->alignment = 2;
         }
+        else if (strcmp(s, "PPC") == 0 || strcmp(s, "PPC64") == 0) {
+            isa->max_instruction_size = 4;
+            isa->alignment = 4;
+        }
     }
     return 0;
 }
diff --git a/agent/system/GNU/Linux/tcf/regset.h b/agent/system/GNU/Linux/tcf/regset.h
index c7799d26..144bd425 100644
--- a/agent/system/GNU/Linux/tcf/regset.h
+++ b/agent/system/GNU/Linux/tcf/regset.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2009, 2015 Wind River Systems, Inc. and others.
+ * Copyright (c) 2009-2017 Wind River Systems, Inc. and others.
  * All rights reserved. This program and the accompanying materials
  * are made available under the terms of the Eclipse Public License v1.0
  * and Eclipse Distribution License v1.0 which accompany this distribution.
@@ -24,13 +24,6 @@
 #include <sys/user.h>
 #include <tcf/regset-mdep.h>
 
-#if defined(__arm__)
-struct user_vfpregs {
-    uint64_t fpregs[32];
-    uint32_t fpscr;
-};
-#endif
-
 #if defined(__powerpc__)
 struct user_fpregs_struct {
     uint64_t fpregs[32];
@@ -41,11 +34,7 @@ struct user_fpregs_struct {
 typedef struct REG_SET {
 #if !defined(MDEP_UseREGSET)
     struct user user;
-#  if defined(__arm__)
-    struct user_vfpregs fp;
-#  else
     struct user_fpregs_struct fp;
-#  endif
 #else
     /* Since Linux 2.6.34 */
     struct regset_gp gp; /* General purpose registers */